This invention is concerned with analog-to-digital conversion, i.e. with converting an analog input signal into a corresponding digital output signal having only discrete output values that change at discrete instants in time (the sampling instants). The analog input signal may correspond to an electrical quantity, such as a voltage, a current, a charge, . . . , but also to other types of physical quantities that have an analog nature, such as a position, an angle, a phase, etc.
Analog-to-digital converters are considered which contain a feedback loop. A/D converters with such a scheme are encountered for example in Sigma-Delta modulators (SDM). FIG. 1 provides an illustration. The feedback loop (1) comprises means (11) for evaluating an error between an analog input Vi and the digital output Dout, a loop filter (12) which operates on the error signal (14) and selectively amplifies frequencies in the signal band of interest, and a quantizer (13) which maps the filter output signal to a discrete digital value (at the sample instants).
In the particular case of an SDM, error evaluation involves a digital-to-analog converter (DAC) for translating the digital output signal to an analog signal that is subtracted from the analog input signal. The complexity of this so called feedback DAC strongly depends on the number of bits. Also, an important problem in SDMs relates to imperfections of this feedback DAC, e.g. its non-linearity. Techniques to deal with this problem exist, e.g. dynamic elements matching or calibration approaches, but these become quite involved (e.g. in terms of required on-chip area) when the feedback DAC has many bits. In general, it is easier to deal with non-linearity problems when the number of levels of the feedback DAC limited (hence, with fewer bits). The DAC resolution is also directly linked to the resolution of the quantizer (13). Also here, circuit-level implementations of the quantizer (13) become easier as the number of bits drops.
The loop filter (12) in FIG. 1 usually comprises an analog filter. In some prior art schemes the loop filter also comprises an ADC (i.e. another quantizer) for conversion to the digital domain and also a digital filter. The scheme therefore has two quantizers in the loop. An important motivation for using such a dual quantization architecture is to limit the number of feedback bits. It requires less complex feedback circuits and gives rise to easier to solve non-linearity problems (e.g. easier implementation of dynamic element matching, a digital correction table, etc.).
Many prior art dual-quantization schemes exist wherein the second quantizer is outside the loop. The second quantizer may then process the analog quantization error of the first quantizer, as is for instance the case in multi-stage noise shaping (MASH) ADCs. Alternatively, the second quantizer may process the same analog input signal as the first quantizer, but again operating outside the loop.
In US2011/050475 an analog-to-digital converter is disclosed comprising an analog component that receives an analog input signal and provides a digital signal, a digital filter component to filter the digital signal and provide a filtered digital signal, a quantizer to quantize the filtered digital signal and provide a quantized digital signal. This prior art loop has two quantizers in the loop, the first being explicitly mentioned above and the second associated with the analog component implicitly performing a quantization by providing a digital signal. The approach aims at cancelling the quantization noise of the explicit quantizer (having a digital input). For this, the filtered digital signal and the quantized digital signal are combined and next applied to a reconstruction component that yields a reconstructed signal. This reconstructed signal is then combined with the quantized signal to provide the A/D converted signal as output. A characteristic feature of this approach for cancelling quantization noise is that the signal transfer function, i.e. the transfer of the input signal to the digital output, remains fixed. The solution proposed in US2011/050475 is, however, only one possible way to compensate for quantization noise caused by the quantizer (13) positioned after the loop filter in FIG. 1.
For some applications wherein an A/D converter as in FIG. 1 is employed, it is advantageous to make the signal transfer function equal to one (at all frequencies). This, for instance, provides a large bandwidth, which on its turn is favourable for obtaining a fast response to sudden changes of the input. In prior art structures with dual in-loop quantization, a known technique for making the signal transfer function unity cannot be easily applied. A known approach is to provide an extra feed-in path for directly coupling the input signal to the input of the quantizer that provides the loop output.
In an A/D converter with dual in-loop quantization (i.e. comprising an ADC in the loop filter) the input of the quantizer that provides the tracking loop output is in the digital domain. Therefore, a direct path from the input of the A/D converter to the quantizer input would require another ADC to be added to the system, for conversion of the analog input signal to a digital signal that may then be added to the quantizer input. So, the signal transfer function of the loop cannot be easily manipulated by structural changes of the feedback loop itself, such as adding extra feed-in paths using the input signal.
Hence, there is room for alternatives and improvements with respect to quantization noise compensation in an A/D converter and the filters used thereto.